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Power Efficient Redundant Execution for Chip Multiprocessors

This paper describes the design of a power efficient microarchitecture for transient fault detection in chip multiprocessors (CMPs) We introduce a new per-core dynamic voltage and frequency scaling (DVFS) algorithm for our architecture that significantly reduces power dissipation for redundant execution with a minimal performance overhead. Using cycle accurate simulation combined with a simple fir

Discrete-Time Cellular Neural Networks Implemented on Field-Programmable Gate-Arrays to Build a Virtual Sensor System

Image processing is one of the popular applications of Cellular Neural Networks. Macro enriched field-programmable gate-arrays can be used to realize such systems on silicon. At first glance a pipelined approach, based on circuit switching, seems promising. The digital implementation supports the handling of grey-level images at 180 to 240 Mpixels per second by exploiting the Xilinx Virtex-II macr

Industrial energy efficiency improvement – the role of policy and evaluation

Popular Abstract in Swedish Industrin i Sverige och i många andra länder står för en stor del av samhällets energianvändning och energi utgör en nödvändig insats i industrins processer och förädling av produkter. Industriell tillverkning sysselsätter dessutom många arbetstagare både direkt och indirekt i utbytet med övriga delar av samhället och ekonomin. Samtidigt medför energianvändning och relaAt EU and to a varying degree at Member State (MS) level, industrial energy efficiency improvement (EEI) is considered an attractive means for reaching political objectives of different dimensions, not least environmental. For energy-intensive manufacturing industry in particular, EEI can lead to cost reductions, improved profitability and competitiveness. However, research and other analyses show