Modification of SOVA-based Algorithms for Efficient Hardware Implementation
In this paper, a modified soft-output Viterbi algorithm (SOVA) is presented to enable efficient hardware implementation. The forward-only processing of the SOVA has an inherent lower latency than forward-backward algorithms such as BCJR and its offspring, which are commonly used in iterative decoders. Thus, SOVA-based architectures require less parallelization and therefore hardware for the same d