A 2-D GRO Vernier Time-to-Digital Converter with Large Input Range and Small Latency
The proposed time-to-digital converter (TDC) arranges two Vernier gated-ring-oscillator (GRO) branches in a 2-dimension (2-D) fashion. All delay differences between X-axis phases and Y-axis phases (based on 2-D definition) can be used, rather than only the diagonal line. The large latency time inherited from Vernier structure is therefore dramatically reduced. The TDC is implemented in a 90nm CMOS